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  • 微IP名称: FIR filter
  • 微IP编号: 276830783
  • 微IP种类: Digital μIP
  • 硬体描述语言: Verilog
  • 保固: 是
  • 仿真工具: Synopsys VCS
  • 仿真工具版本:
  • 设计型式: RTL
  • GDSII在晶圆厂合并: 否
    贩售者资讯
  • 会员编号:8920988000100487
  • 卖家评价:
  • 参与评价总人数:有0人
 

1. 概述:

FIR_F is an FIR filter implementation designed for very high sample rate applications.   Organized as a systolic array the filter is modular and fully scalable, permitting the user to specify large order filters without compromising maximum attainable clock-speed.  Mathematically, the filter implements the difference equation:
y[n] = h0 x[n] + h1 x[n−1] + ... + hN x[n−N ]

In the above equation, the input signal is x[n], the output signal is y[n] and h0 to hN represent the filter coefficients.  The number N is the filter order, the number of filter taps being equal to N+1.

 

Application

  • General purpose FIR filters with odd or even numbers of taps
  • Filters with arbitrary sets of coefficients
  • Very high-speed filtering applications


2. 售价:

参考报价

允许多个授权 :


3. 工作频率:

300 MHz


4. 逻辑闸数:

无资料


5. 工艺:

无资料


6. 版本:

1.0