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  • 微IP名称: HEART(High Efficient Accumulative Repairing Technical)
  • 微IP编号: 1196020508
  • 微IP种类: Digital μIP
  • 硬体描述语言: Verilog
  • 保固: 否
  • 仿真工具: Cadence NC-Verilog
  • 仿真工具版本:
  • 设计型式: RTL
  • GDSII在晶圆厂合并: 否
    贩售者资讯
  • 会员编号:8161899000600443
  • 卖家评价:
  • 参与评价总人数:有0人
 

1. 概述:

HEART can efficient repair faulty SRAM after using BRAINS. SoCs can mantain correctness of functions and avoid fatal error of system reault in SRAM's defect through SRAM's repairing technical.
HEART is SRAM accumulative repairing technical, and it combines advantages of Soft-repair and Hard-repair. HEART supports internal registers of SoCs and external storages of SoCs to record SRAM's faulty information. Once SoCs have new SRAM's defect after using them for a long time, users can repeated repair SRAM's defect through HEART. In addtion, HEART also support "On-Demad" testing and repairing requirement. It means that users can enable system registers of SoCs or signal of HEART to test and repair SRAM at one when SoCs have fatal error situations.

 


2. 售价:

50000 点

允许多个授权 :

   - 2 ~ 5 个授权的折扣数:10 %
   - 6 ~ 10 个授权的折扣数:15 %
   - 大于 10 个授权的折扣数:0 %


3. 工作频率:

2.2 GHz


4. 逻辑闸数:

5.25 K Gates


5. 工艺:

40 nm


6. 版本:

heart_v1