客服
中
心
| DDR4 SDRAM Controller Core | 参考报价 | 无资料 | 无资料 | 无资料 |  |
|
| Double Data Rate 4 (DDR4) SDRAM Controller Core is designed for use in applications requiring high memory throughput, high clock rates and full programmability. The core uses bank management modules to monitor the status of each SDRAM bank. Banks are only opened or closed when necessary, minimizing access delays. Up to 32 banks can be managed at one time. The core supports all new DDR4 features, including: 3DS device configurations, write CRC, data bus inversion (DBI), fine granu-larity refresh, additive latency, per-DRAM addressability, and temperature controlled refresh. | 概述 | |||||
| 微IP | 价格 | 逻辑闸数 | 工作频率 | 工艺 | 评价 | |
|---|---|---|---|---|---|---|