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  • 微IP名称: PLL 1600M UMC 28 nm logic and Mixed-Mode HPC process
  • 微IP编号: 208029515
  • 微IP种类: Analog μIP
  • 硬体描述语言: Verilog Behavioral Model
  • 保固: 是
  • 仿真工具: Cadence NC-Verilog
  • 仿真工具版本:
  • 设计型式: GDS
  • GDSII在晶圆厂合并: 否
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  • 会员编号:2804246000800625
  • 卖家评价:
  • 参与评价总人数:有0人
 

1. 概述:

A Phase-Locked Loop (PLL) with an operating frequency ranging from 200 MHz to 1600 MHz.
This PLL is designed with the UMC 28 nm logic and Mixed-Mode HPC process.
It can be integrated into a chip to generate a high-speed clock.
The embedded divide-by-4 loop divider allows users to boost the output frequency of up to 1600 MHz.


2. 售价:

参考报价

允许多个授权 :


3. 试用价:

参考报价


4. 工作频率:

1.6 GHz


5. 面积:

270 μm^2


6. 工艺:

28 nm


7. 版本:

1