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  • 微IP名称: Ultra-low Power Voltage Reference in 40 nm (VVR060LT040)
  • 微IP编号: 759504522
  • 微IP种类: Analog μIP
  • 硬体描述语言: Verilog Behavioral Model
  • 保固: 否
  • 仿真工具: Cadence NC-Verilog
  • 仿真工具版本:
  • 设计型式: GDS & Schematic
  • GDSII在晶圆厂合并: 否
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  • 会员编号:2022490000500561
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  • 参与评价总人数:有0人
 

1. 概述:

Voltage Reference for Integrated PMU (Silicon-proven 40 nm, low-power for IoT with quiescent current of <0.9 μA)

This series of fully-integrated low power voltage references generates a 0.6 V output voltage and supports an input from 2.8 to 4.2 V. They operate at an ultra-low quiescent current of < 0.9 μA. These voltage references are silicon-proven in a 40 nm process and are a part of our 40 nm integrated power management unit (PMU) IP core series that has been optimized for integration into Application Specific Integrated Circuits (ASICs) or Systems-on-a-Chip (SoCs), including radio frequency (RF), wireless, and narrowband Internet of Things (NB-IoT) applications.


2. 售价:

参考报价

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3. 试用价:

参考报价


4. 工作频率:

无资料


5. 面积:

无资料


6. 工艺:

40 nm


7. 版本:

1.0