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  • 微IP名称: 10-Bit 1MSPS Cyclic A/D Converter
  • 微IP编号: 828707285
  • 微IP种类: Analog μIP
  • 硬体描述语言: Verilog Behavioral Model
  • 保固: 是
  • 仿真工具: Cadence NC-Verilog
  • 仿真工具版本:
  • 设计型式: GDS & Schematic
  • GDSII在晶圆厂合并: 是
    贩售者资讯
  • 会员编号:5171824000400575
  • 卖家评价:
  • 参与评价总人数:有0人
 

1. 概述:

 

This IP is a 1MSPS , single supply , 10-bit analog-to-digital converter (ADC) that combines a low cost, high speed CMOS process and a novel architecture. It is a complete ADC with an on chip, high performance sample-and-hold amplifier and voltage reference. An external reference can be chosen to suit the dc accuracy and temperature drift requirements of the application. The device uses a cyclic architecture with digital error correction logic to guarantee no missing code over the full operating range.

The input of this ADC is highly flexible. A truly differential input structure allows for both single-ended and differential input interface of varying span. The sample-and-hold amplifier (SHA) is equally suited for multiplexed systems that switched full-scale voltage levels in successive channels as well as sampling single-channel inputs at frequencies up to and beyond the Nyquist rate of 500KHz


2. 售价:

参考报价

允许多个授权 :

   - 2 ~ 5 个授权的折扣数:5 %
   - 6 ~ 10 个授权的折扣数:10 %
   - 大于 10 个授权的折扣数:0 %


3. 试用价:

参考报价


4. 工作频率:

10.12 Hz


5. 面积:

300.5 K μm^2


6. 工艺:

250 nm


7. 版本:

1.0