1. 概述：

The SAR-ADC is a low power ADC that is implemented in Successive Approximation architecture. It can provide 12-bit resolution capability with only 3V supply voltage. It accepts an analog input range from 0 to V_CC   and digitizes the input at a maximum sampling frequency rate of 800KHz at 5V supply voltage. This ADC also includes MUX design to select 0 of 7 analog inputs. The power dissipation is less than 5mW with 5V power supply. This SAR-ADC is implemented in SMIC 0.18μm generic CMOS technology.

2. 售价：

参考报价

允许多个授权 : 否

3. 试用价：

参考报价

4. 工作频率：

25 MHz

5. 面积：

无资料

6. 工艺：

180 nm

7. 版本：

1.0