Contact Us   客
   服
   中
   心










商城 > IP 商城

    
ITU-R BT.656 video decoder 参考报价 无资料 300 Hz 无资料  
DEC_BT656 is a digital video decoder with integrated colour-space converter.  It's function is to extract the valid pixels from a BT.656 video stream and convert them to 24-bit RGB for subsequent processing. Pixels   are   extracted   from   the   BT.656   input   stream   and   converted   to RGB888 format.    Application  BT.656 input video capture and processing PAL & NTSC SDTV interlaced format conversion 概述
4K/8k capable JPEG Encoder with scalable 参考报价 无资料 无资料 无资料  
This JPEG compression IP core supports the Baseline Sequential DCT and the Ex- tended Sequential DCT modes of the ISO/IEC 10918-1 standard. It implements a scalable, ultra-high-performance, ASIC or FPGA, hardware JPEG encoder that can compress high pixel rate video using significantly fewer silicon resources and less pow- er than encoders for video compression standards such as HEVC/H,265, DSC, AVC/H.264, or JPEG200. The JPEG-MT-V Encoder produces compressed JPEG images and the video payload for Motion-JPEG container formats. It accepts images with up to 12-bit color samples and up to four color components, in all widely-used color subsampling formats. Depending on its configuration, the encoder processes from two to 32 color samples per clock cycle, enabling it to compress UHD (4K/8K) video and/or very high frame vid- eo. Once programmed, the easy-to-use encoder requires no assistance from a host pro- cessor to compress an arbitrary number of frames. SoC integration is straightforward thanks to standardized AMBA® interfaces: AXI Streaming for pixel and compressed da- ta, and a 32-bit APB slave interface for registers access. Users can optionally insert timestamps or other metadata in the compressed stream using a dedicated AXI Stream- ing interface. 概述
8/12-bit JPEG decoder for ASIC and FPGA with scalable 参考报价 无资料 无资料 无资料  
This JPEG decompression IP core supports the Baseline Sequential DCT and Extend- ed Sequential DCT modes of the ISO/IEC 10918-1 standard. It implements a scalable, ultra-high-performance, ASIC or FPGA, hardware JPEG decoder that handles extreme- ly high pixel rates. The JPEG-ST-V Decoder decompresses JPEG images and the video payload for Mo- tion-JPEG container formats. It accepts compressed streams of images with 8- or 12-bit color samples and up to four color components, in all widely-used color subsampling formats. Depending on its configuration, the decoder processes from two to 32 color samples per clock cycle. Its high throughput capabilities are best exploited when decompressing streams produced by the JPEG-MT-V Encoder Core. This Encoder-Decoder pair pro- vide an extremely cost effective solution for streaming or archiving UHD (4K/8K) video, or very high frame rates at lower resolutions. Once programmed, the easy-to-use decoder operates on a standalone basis, parsing marker segments and decompressing coded data with no assistance from a host pro- cessor. The decoder reports the image format (i.e., resolution, subsampling format, and color sample-depth) to the system, so that the decoded images are properly further processed and/or displayed. 概述
微IP 价格 逻辑闸数 工作频率 工艺   评价

 1  2  3