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Binary FSK Demodulator 参考报价 无资料 200 MHz 无资料  
This IP is a precision Binary-FSK Demodulator IP Core based on a non-coherent receiver design.  The demodulator is fully programmable, allowing   for   a   varied   range   of   symbol   rates   and   mark/space tone frequencies. Input data samples may be either complex or real for support of either passband or baseband signals.  The module allows easy connectivity to an external ADC with up to 16-bit signed input samples.   Applications: Short range telemetry Software radio 概述
2.4G PLL(UMC 28nm HPC) 参考报价 24.000 K μm^2 2.4 GHz 28 nm  
Clock output 2.4GHz Input clock 10 ~ 50MHz Current consumption: < 4mA Supply: 1.8V / 0.9V UMC 28nm HPC 概述
High-speed FIR Filter with symmetry 参考报价 无资料 500 MHz 无资料  
This IP is an FIR filter IP Core with symmetrical coefficients and an even or odd number of filter taps. The architecture exploits the symmetry of the coefficients using half the number of   multipliers compared to a normal FIR implementation. The result is a filter with a reduced area footprint while still maintaining the capacity for high sample rates.   Application High-speed filter applications where resources are limited General purpose FIR filters with symmetrical coefficients   概述
IIR filter Second-Order 参考报价 无资料 150 MHz 无资料  
This IP is a second order IIR filter sometimes referred to as a 'bi-quad'. Internally,   it   has   a   fully   pipelined   architecture   permitting   the   highest possible sample rates for IIR filtering.    Values are sampled on the rising clock-edge of clk when EN is high.  The latency of the IIR filter between the first input sample and the first output sample is 7 clock cycles.    Applicaion IIR filtering in higher sample-rate applications General purpose high-pass, band-pass and low-pass filters 概述
Color-space Converter 参考报价 无资料 400 MHz 无资料  
This  IP  is a fully pipelined color-space converter that converts pixels between the RGB and YCbCr color spaces.  In total, the IP Core package contains two distinct modules – one module that converts   from   24-bit   RGB   to   30-bit   4:4:4   YCbCr   and   the   other   that performs the reciprocal operation from 4:4:4 YCbCr to RGB.   Application Digital video and image processing  概述
ITU-R BT.656 video decoder 参考报价 无资料 300 Hz 无资料  
DEC_BT656 is a digital video decoder with integrated colour-space converter.  It's function is to extract the valid pixels from a BT.656 video stream and convert them to 24-bit RGB for subsequent processing. Pixels   are   extracted   from   the   BT.656   input   stream   and   converted   to RGB888 format.    Application  BT.656 input video capture and processing PAL & NTSC SDTV interlaced format conversion 概述
ITU-R BT.656 video encoder 参考报价 无资料 200 MHz 无资料  
ITU-R_BT is a digital video encoder with integrated colour-space converter.   The encoder accepts 24-bit RGB pixels from sequential odd and even fields.   These pixels are then mapped to the YCbCr colour-space and formatted correctly into a BT output stream. The output of the encoder generates an industry standard ITU-R BT.656 format video stream together with a video_val signal that is asserted with the first valid byte of the output stream.   Applications BT.656 output video generation PAL & NTSC SDTV video format conversion   概述
Video Frame Buffer 参考报价 无资料 300 MHz 无资料  
VID_FB is a high-speed multi-format video frame buffer that asynchronously samples an input video stream and buffers it in an   external   memory. Output   pixels   are   read   out   of   the   buffer   and synchronised to the system clock domain.  The VID_FB will automatically adapt to different input and output frame rates. If the input frame rate is too high, then the VID_FB will cleanly drop or 'skip' an input frame.  Likewise, if the output frame rate is higher than the input frame rate, then frames will be repeated 3 .   The result is a system that seamlessly adapts to the different frame rates at the input and output of the VID_FB.   Applications Buffering video frames in external memory Real-time digital video applications Genlocking of multiple video sources   概述
金融资讯安全开发平 参考报价 无资料 无资料 无资料  
This Platform can decrease timing for develop. Single Chip Solution 32-bit RISC MCU SPI/UART/I2C/GPIO Crypto Engine PCIE Gen2/Gen3 USB 2.0 Flash Controller DDR4 Easy Integrated Customer’s Logic Applications Security Network Financial Information Security 概述
进阶物联网开发平台 参考报价 无资料 无资料 无资料  
This Platform can decrease timing for develop. Single Chip Solution Integrated Gyroscope Sensor Integrated Acceleration Sensor Integrated Communication 32-bit RISC MCU ADC SPI/UART/I2C/GPIO Crypto Engine Easy Integrated Customer’s Logic Applications Security Systems Home and Building Automation IoT 概述
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